Updated July 29, 2026

22 open positions

Verilog Jobs with a Great Work-Life Balance

Browse 22+ verilog jobs at companies offering unlimited PTO and best places to work—full pay and a better work-life balance. 4 new this week. Hiring companies include Arista Networks, Graphcore, and CHAOS Industries.

22

Jobs

4

New This Week

9+

Companies

Updated Daily

FPGA Design Engineer

1mo

Arista Networks

RemotePoland

57 · Good5 day weekBest Place to Work

Lead, Software Engineer

4h

L3Harris Technologies

OnsiteMillersville, USA

63 · Good9 day fortnight

Sr. Specialist Software Engineer

4h

L3Harris Technologies

OnsiteMillersville, USA

63 · Good9 day fortnight

FPGA Design Engineer

4h

OnsiteCambridge, UK

63 · Good5 day weekGenerous PTO

ASIC Digital Designer

17h

HybridGeneva, Switzerland

64 · Good5 day weekGenerous PTOCHF 5k – CHF 6k

FPGA Firmware Engineer

11d

General Dynamics UK

HybridHastings, UK

60 · Good9 day fortnight£36k – £45k

Simulation Software Engineer

1mo

United Launch Alliance

HybridCentennial, USA

63 · Good9 day fortnight

SoC Architect

12d

HybridBristol, UK

57 · Good5 day weekUnlimited PTO

SoC Architect

12d

HybridBristol, UK

57 · Good5 day weekUnlimited PTO

SoC Architect

12d

HybridBristol, UK

57 · Good5 day weekUnlimited PTO

Senior FPGA / Digital Design Engineer

1mo

OnsiteAlbuquerque, USA

61 · Good9 day fortnight

Senior Hardware Design Engineer, Ethernet Switching

18d

Arista Networks

OnsiteRoseville, USA

57 · Good5 day weekBest Place to Work$260k – $470k

Hardware Design Integrity Engineer

25d

Arista Networks

OnsiteSanta Clara, USA

57 · Good5 day weekBest Place to Work$130k – $225k

Sr. FPGA Engineer

1mo

CHAOS Industries

OnsiteEl Segundo, USA

57 · Good5 day weekUnlimited PTO

FPGA Engineer

1mo

CHAOS Industries

OnsiteEl Segundo, USA

57 · Good5 day weekUnlimited PTO

Firmware Engineer

1mo

CHAOS Industries

OnsiteEl Segundo, USA

57 · Good5 day weekUnlimited PTO

Graduate SoC Architect

12d

HybridBristol, UK

57 · Good5 day weekUnlimited PTO

DFT Engineer

12d

HybridBristol or Cambridge

57 · Good5 day weekUnlimited PTO

FPGA Design Engineer

1mo

Arista Networks

HybridDublin, Ireland

57 · Good5 day weekBest Place to Work

Senior Hardware Design Engineer, Ethernet Switching

1mo

Arista Networks

OnsiteSanta Clara, USA

57 · Good5 day weekBest Place to Work

Hardware Engineer

1mo

Arista Networks

OnsiteSydney, Australia

57 · Good5 day weekBest Place to Work

Senior Hardware Design Engineer, High Speed Networking

1mo

Arista Networks

OnsiteNashua, USA

57 · Good5 day weekBest Place to Work

Every role is a genuine reduced-hours position, manually curated and refreshed daily. How we curate

Got questions?

Frequently asked questions

Everything you need to know about 4-day week jobs

Employers hiring for Verilog on this page include Arista Networks, Graphcore, and CHAOS Industries. Verilog roles appear most frequently in engineering, data, and platform teams at companies that have adopted a reduced-hours schedule. Each listing indicates the seniority level and whether Verilog is a primary requirement or one of several preferred skills — expand any role above to see the full stack and responsibilities.

Verilog roles span the full seniority range — we list 22 open roles requiring Verilog across entry-level, mid-level, senior, lead, and staff/principal positions. Senior and above tend to dominate because employers offering reduced-hours schedules often lean toward experienced individual contributors who can deliver consistently in fewer hours. Filter by level in the sidebar to narrow the list above.

Lead with measurable outcomes over time spent — Verilog hiring managers at reduced-hours companies care about delivered value, not hours worked. Highlight projects where you shipped at a steady cadence, collaborated asynchronously, or reduced engineering toil through automation or tooling. Include concrete metrics (latency improvements, adoption numbers, cost reductions) rather than vague duty descriptions. Expand listings above to see the exact framing each employer uses in their job descriptions.

For the full-pay schedules here — 4-day weeks and 9-day fortnights — yes: you keep a full-time salary for a shorter week. Part-time and pro-rata roles instead scale pay to hours, and each listing makes the arrangement clear. Verilog roles in tech and data typically command premium rates at both reduced-hours and traditional employers; specific ranges depend on seniority, location, and sub-specialty (e.g. backend vs frontend, infra vs ML). Individual listings above show exact bands where the employer publishes them.

Depends on the role, but Verilog candidates who also demonstrate async communication, clean documentation, and cross-functional collaboration are typically strong fits for reduced-hours employers — those companies rely on written-first communication and high-context handoffs to operate on a compressed schedule. Technical-adjacent skills vary by stack. Browse the top skills shown in the sidebar to see which tags co-occur most often with Verilog on current listings.